The present invention relates generally to semiconductor devices, and, more particularly, to an integrated circuit amplifier device and method utilizing FET tunneling gate current.
Amplifiers are commonly used in RF and analog applications. For a field effect transistor (FET) amplifier, a high gain associated therewith generally results from a device having a large gate width. The gain of an FET amplifier is given by the expression:Gain=Gm/Gds  (eq. 1);
wherein Gm and Gds are, respectively, the transconductance and output conductance of the FET. In turn, the transconductance, Gm, of the FET is given by the expression:Gm=d(ID)/d(Vg) at a given value of Vds  (eq. 2);
while the output conductance of the FET is given by the expression:Gds=d(ID)/d(Vds) at a given value of Vg  (eq. 3).
The transconductance of an FET is strongly dependent upon the channel length of the device (i.e., the shorter the channel length, the greater the transconductance of the FET). However, given certain technologies having minimum channel lengths associated therewith, the value of Gm cannot be arbitrarily increased. Moreover, the peak value of transconductance occurs at a specific gate voltage for a minimum channel length and, as such, the FET amplifier would need to be designed for that specific gate voltage to take advantage of the peak Gm. Thus, the voltage options for the design of a conventional FET amplifier are limited in this sense. Furthermore, because a high output voltage (Vds) is desired, and since the input voltage Vgs could be at low overdrive (or at 0.5 Vds), both of these conditions can lead to hot carrier degradation. FIG. 1 is a graph that illustrates the degradation of amplification factor due to hot carrier effects.
Since Gm and Gds for a conventional FET amplifier are not decoupled from each other, but rather are both dependent upon the design of a given FET, each parameter cannot be independently optimized with respect to one another for gain purposes (i.e., increasing Gm while also decreasing Gds for the same device). Still a further consideration is the fact that the frequency response of the amplifier is limited by the gate oxide capacitance, which increases as CMOS scaling is intensified. The increase of gain is again coupled with optimization of the frequency response, since the two parameters are controlled by the same FET with an ultra-thin gate oxide.
Accordingly, it would be desirable to have an integrated circuit amplifier device in which the various gain parameters are capable of independent optimization with respect to one another.